Re: diode on FET gate


Date: Wed Oct 19 1994 - 16:40:48 EDT

A diode clipper would limit the gain and the oscillation level by loading
down the tuned circuit, destroying it's Q. That's probably not what you

Usually the gate diode is combined with a blocking capacitor and a "leak"
resistor to form a clamper. A negative DC voltage develops on the gate
and serves as AGC for the oscillator. Note that the gate of a JFET with
no source resistor would also conduct and form a clamper. As either the
gate or the diode approach conduction, there is rapid change in the
junction capacitance which affects the phase of the tuned circuit and
generates harmonics. The diode capacitance might be an order of
magnitude smaller so letting the diode do the work could reduce harmonics.

Instead of depending on the clamper, it's possible to bias the FET using
a bypassed source resistor. Since FETs are slightly nonlinear, it is
possible with careful adjustment of feedback or bias to stabilize the
oscillator at a lower power level with no gate conduction. FETs vary a
great deal so you might want to have a trimmer adjustment for the bias
or feedback.

Another way to stabilize oscillator is to limit amplitude in the
output circuit (non Class A) as in bipolar transistor oscillators. The
phase noise could be better than a low power Class A circuit, but you
need to do something (filter, clipper, or push-pull limiter) to fix
the ugly waveform before sending it to a mixer or antenna. Most single-
transistor QRP rigs are of this type. However, most amateur VFOs run
Class A because they are optimized for low drift (low power level) and
harmonics rather than low noise and high output.

Robert Heiss

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