From: Ray Anderson (Raymond.Anderson@EBay.Sun.COM)
I have just posted two Postscript schematic files
to the ftp.netcom.com site in the /pub/rander/qrp directory.
The new files are:
phzloop.ps is a conceptual schematic of the scheme I
discussed in my earlier message that utilizes a locked loop and
a 2 X VFO. This schematic does NOT contain component values
(I was in a hurry last nite when I drew it) and may (probably)
has other errors, but serves to illustrate the idea.
phztrim.ps is a conceptual schematic illustrating the
scheme I discussed using discrete gate delays to achieve some
adjustability. While I don't recommend it for reasons earlier
stated, perhaps someone might want to play with the concept.
The chips specified are just illustrative and may be changed
with impunity. Also to get useful adjustment range, more stages
of delay may be required. Your mileage may vary!
I am going to be doing some SPICE simulations on the
circuit shown in the phzloop.ps schematic and will post a message
with the results of the simulation and probably a spice input
deck for those who want to experiment with it. This will probably
take a couple of days.
72's de Ray, WB6TPU
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